📝 Register Allocation - abnv · Scour

Building Your Own Efficient uint128 in C++

solidean.com·1d·

Discuss: Lobsters, Hacker News, Hacker News, r/cpp

Scalable Adaptive Memory Compiler Optimization via Multi-Objective Evolutionary Algorithms

dev.to·18h·

Discuss: DEV

🧠Memory Hierarchy

One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon

riscv.org·53m

Complexity of ArenaAllocator

ziggit.dev·1d

🏟️Arena Allocation

CPU-less parallel execution of lambda calculus in digital logic

arxiv.org·15h

📏Linear Scanning

The Story on ISPC (Intel SPMD Program Compiler)

pharr.org·1d·

Discuss: Hacker News

🔀SIMD Programming

A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)

semiengineering.com·2h

📏Linear Memory

Python Code Optimization Tips

denvaar.dev·17h

⚡Interpreter Optimization

FlashAttention 4: Faster, Memory-Efficient Attention for LLMs

digitalocean.com·8h

🗺️Region Inference

GNU C Language Manual

gnu.org·1h

🪄C Metaprogramming

The Lost Art of Structure Packing

catb.org·3d·

Discuss: Hacker News

📦Compact Data

jameysharp/live-long-and-prospero: A small compiler for the Prospero Challenge in Constructive Solid Geometry

github.com·2d

🧸Toy Compilers

Rust async combinators for elegant and secure concurrency

kerkour.com·14h·

Discuss: r/rust

🪆Embedded DSLs

Everyone deserves a better computer | Ahead Computing

aheadcomputing.com·4h·

Discuss: Hacker News

🔀SIMD Programming

Union-Find Path Compression: A Visual Dry Run

dev.to·23h·

Discuss: DEV

📐Succinct Data Structures

SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads

danglingpointers.substack.com·1d·

Discuss: Substack

🤝Cooperative Threading

Uncertainty-Aware Gradient Signal-to-Noise Data Selection for Instruction Tuning

arxiv.org·15h

💓Live Variable Analysis

Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension

semiwiki.com·1d

Taking Things Apart

agentultra.com·17h

💾Persistent Heaps

Open-Source FPGA Implementation of an I3C Controller[v1]

preprints.org·1d

⚡Control Synthesis

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